The board diagram for the completed circuit is given below.
The assignment for this project was to produce a psuedo-random number sequence using D-type flipflops. A 555 timer chip was used to produce the clock pulse, which was passed through an inverter before being sent to the 74194 D-flipflop, to reduce noise. A .1 farad electrolytic capacitor, a 330 ohm resistor, and a 1 M ohm resistor are used to obtain an observable clock pulse of about 1 hz. The logic diagram for the circuit is below.
The board diagram for the completed circuit is given below.
